#name: SME extension (LD1x instructions)
#as: -march=armv8-a+sme
#objdump: -dr

.*:     file format .*

Disassembly of section \.text:

0+ <.*>:
   0:	e01f0000 	ld1b	{za0h.b\[w12, 0\]}, p0/z, \[x0, xzr\]
   4:	e01f03e0 	ld1b	{za0h.b\[w12, 0\]}, p0/z, \[sp, xzr\]
   8:	e00003e0 	ld1b	{za0h.b\[w12, 0\]}, p0/z, \[sp, x0\]
   c:	e01f7e2f 	ld1b	{za0h.b\[w15, 15\]}, p7/z, \[x17, xzr\]
  10:	e01f7fef 	ld1b	{za0h.b\[w15, 15\]}, p7/z, \[sp, xzr\]
  14:	e0117fef 	ld1b	{za0h.b\[w15, 15\]}, p7/z, \[sp, x17\]
  18:	e05f0000 	ld1h	{za0h.h\[w12, 0\]}, p0/z, \[x0, xzr, lsl #1\]
  1c:	e05f03e0 	ld1h	{za0h.h\[w12, 0\]}, p0/z, \[sp, xzr, lsl #1\]
  20:	e0400000 	ld1h	{za0h.h\[w12, 0\]}, p0/z, \[x0, x0, lsl #1\]
  24:	e04003e0 	ld1h	{za0h.h\[w12, 0\]}, p0/z, \[sp, x0, lsl #1\]
  28:	e05f7e2f 	ld1h	{za1h.h\[w15, 7\]}, p7/z, \[x17, xzr, lsl #1\]
  2c:	e05f7fef 	ld1h	{za1h.h\[w15, 7\]}, p7/z, \[sp, xzr, lsl #1\]
  30:	e0517c0f 	ld1h	{za1h.h\[w15, 7\]}, p7/z, \[x0, x17, lsl #1\]
  34:	e0517fef 	ld1h	{za1h.h\[w15, 7\]}, p7/z, \[sp, x17, lsl #1\]
  38:	e09f0000 	ld1w	{za0h.s\[w12, 0\]}, p0/z, \[x0, xzr, lsl #2\]
  3c:	e09f03e0 	ld1w	{za0h.s\[w12, 0\]}, p0/z, \[sp, xzr, lsl #2\]
  40:	e0800000 	ld1w	{za0h.s\[w12, 0\]}, p0/z, \[x0, x0, lsl #2\]
  44:	e08003e0 	ld1w	{za0h.s\[w12, 0\]}, p0/z, \[sp, x0, lsl #2\]
  48:	e09f7e2f 	ld1w	{za3h.s\[w15, 3\]}, p7/z, \[x17, xzr, lsl #2\]
  4c:	e09f7fef 	ld1w	{za3h.s\[w15, 3\]}, p7/z, \[sp, xzr, lsl #2\]
  50:	e0917c0f 	ld1w	{za3h.s\[w15, 3\]}, p7/z, \[x0, x17, lsl #2\]
  54:	e0917fef 	ld1w	{za3h.s\[w15, 3\]}, p7/z, \[sp, x17, lsl #2\]
  58:	e0df0000 	ld1d	{za0h.d\[w12, 0\]}, p0/z, \[x0, xzr, lsl #3\]
  5c:	e0df03e0 	ld1d	{za0h.d\[w12, 0\]}, p0/z, \[sp, xzr, lsl #3\]
  60:	e0c00000 	ld1d	{za0h.d\[w12, 0\]}, p0/z, \[x0, x0, lsl #3\]
  64:	e0c003e0 	ld1d	{za0h.d\[w12, 0\]}, p0/z, \[sp, x0, lsl #3\]
  68:	e0df7e2f 	ld1d	{za7h.d\[w15, 1\]}, p7/z, \[x17, xzr, lsl #3\]
  6c:	e0df7fef 	ld1d	{za7h.d\[w15, 1\]}, p7/z, \[sp, xzr, lsl #3\]
  70:	e0d17c0f 	ld1d	{za7h.d\[w15, 1\]}, p7/z, \[x0, x17, lsl #3\]
  74:	e0d17fef 	ld1d	{za7h.d\[w15, 1\]}, p7/z, \[sp, x17, lsl #3\]
  78:	e1df0000 	ld1q	{za0h.q\[w12, 0\]}, p0/z, \[x0, xzr, lsl #4\]
  7c:	e1df03e0 	ld1q	{za0h.q\[w12, 0\]}, p0/z, \[sp, xzr, lsl #4\]
  80:	e1c00000 	ld1q	{za0h.q\[w12, 0\]}, p0/z, \[x0, x0, lsl #4\]
  84:	e1c003e0 	ld1q	{za0h.q\[w12, 0\]}, p0/z, \[sp, x0, lsl #4\]
  88:	e1df7e2f 	ld1q	{za15h.q\[w15, 0\]}, p7/z, \[x17, xzr, lsl #4\]
  8c:	e1df7fef 	ld1q	{za15h.q\[w15, 0\]}, p7/z, \[sp, xzr, lsl #4\]
  90:	e1d17c0f 	ld1q	{za15h.q\[w15, 0\]}, p7/z, \[x0, x17, lsl #4\]
  94:	e1d17fef 	ld1q	{za15h.q\[w15, 0\]}, p7/z, \[sp, x17, lsl #4\]
  98:	e01f8000 	ld1b	{za0v.b\[w12, 0\]}, p0/z, \[x0, xzr\]
  9c:	e01f83e0 	ld1b	{za0v.b\[w12, 0\]}, p0/z, \[sp, xzr\]
  a0:	e00083e0 	ld1b	{za0v.b\[w12, 0\]}, p0/z, \[sp, x0\]
  a4:	e01ffe2f 	ld1b	{za0v.b\[w15, 15\]}, p7/z, \[x17, xzr\]
  a8:	e01fffef 	ld1b	{za0v.b\[w15, 15\]}, p7/z, \[sp, xzr\]
  ac:	e011ffef 	ld1b	{za0v.b\[w15, 15\]}, p7/z, \[sp, x17\]
  b0:	e05f8000 	ld1h	{za0v.h\[w12, 0\]}, p0/z, \[x0, xzr, lsl #1\]
  b4:	e05f83e0 	ld1h	{za0v.h\[w12, 0\]}, p0/z, \[sp, xzr, lsl #1\]
  b8:	e0408000 	ld1h	{za0v.h\[w12, 0\]}, p0/z, \[x0, x0, lsl #1\]
  bc:	e04083e0 	ld1h	{za0v.h\[w12, 0\]}, p0/z, \[sp, x0, lsl #1\]
  c0:	e05ffe2f 	ld1h	{za1v.h\[w15, 7\]}, p7/z, \[x17, xzr, lsl #1\]
  c4:	e05fffef 	ld1h	{za1v.h\[w15, 7\]}, p7/z, \[sp, xzr, lsl #1\]
  c8:	e051fc0f 	ld1h	{za1v.h\[w15, 7\]}, p7/z, \[x0, x17, lsl #1\]
  cc:	e051ffef 	ld1h	{za1v.h\[w15, 7\]}, p7/z, \[sp, x17, lsl #1\]
  d0:	e09f8000 	ld1w	{za0v.s\[w12, 0\]}, p0/z, \[x0, xzr, lsl #2\]
  d4:	e09f83e0 	ld1w	{za0v.s\[w12, 0\]}, p0/z, \[sp, xzr, lsl #2\]
  d8:	e0808000 	ld1w	{za0v.s\[w12, 0\]}, p0/z, \[x0, x0, lsl #2\]
  dc:	e08083e0 	ld1w	{za0v.s\[w12, 0\]}, p0/z, \[sp, x0, lsl #2\]
  e0:	e09ffe2f 	ld1w	{za3v.s\[w15, 3\]}, p7/z, \[x17, xzr, lsl #2\]
  e4:	e09fffef 	ld1w	{za3v.s\[w15, 3\]}, p7/z, \[sp, xzr, lsl #2\]
  e8:	e091fc0f 	ld1w	{za3v.s\[w15, 3\]}, p7/z, \[x0, x17, lsl #2\]
  ec:	e091ffef 	ld1w	{za3v.s\[w15, 3\]}, p7/z, \[sp, x17, lsl #2\]
  f0:	e0df8000 	ld1d	{za0v.d\[w12, 0\]}, p0/z, \[x0, xzr, lsl #3\]
  f4:	e0df83e0 	ld1d	{za0v.d\[w12, 0\]}, p0/z, \[sp, xzr, lsl #3\]
  f8:	e0c08000 	ld1d	{za0v.d\[w12, 0\]}, p0/z, \[x0, x0, lsl #3\]
  fc:	e0c083e0 	ld1d	{za0v.d\[w12, 0\]}, p0/z, \[sp, x0, lsl #3\]
 100:	e0dffe2f 	ld1d	{za7v.d\[w15, 1\]}, p7/z, \[x17, xzr, lsl #3\]
 104:	e0dfffef 	ld1d	{za7v.d\[w15, 1\]}, p7/z, \[sp, xzr, lsl #3\]
 108:	e0d1fc0f 	ld1d	{za7v.d\[w15, 1\]}, p7/z, \[x0, x17, lsl #3\]
 10c:	e0d1ffef 	ld1d	{za7v.d\[w15, 1\]}, p7/z, \[sp, x17, lsl #3\]
 110:	e1df8000 	ld1q	{za0v.q\[w12, 0\]}, p0/z, \[x0, xzr, lsl #4\]
 114:	e1df83e0 	ld1q	{za0v.q\[w12, 0\]}, p0/z, \[sp, xzr, lsl #4\]
 118:	e1c08000 	ld1q	{za0v.q\[w12, 0\]}, p0/z, \[x0, x0, lsl #4\]
 11c:	e1c083e0 	ld1q	{za0v.q\[w12, 0\]}, p0/z, \[sp, x0, lsl #4\]
 120:	e1dffe2f 	ld1q	{za15v.q\[w15, 0\]}, p7/z, \[x17, xzr, lsl #4\]
 124:	e1dfffef 	ld1q	{za15v.q\[w15, 0\]}, p7/z, \[sp, xzr, lsl #4\]
 128:	e1d1fc0f 	ld1q	{za15v.q\[w15, 0\]}, p7/z, \[x0, x17, lsl #4\]
 12c:	e1d1ffef 	ld1q	{za15v.q\[w15, 0\]}, p7/z, \[sp, x17, lsl #4\]
 130:	e1c083e0 	ld1q	{za0v.q\[w12, 0\]}, p0/z, \[sp, x0, lsl #4\]
 134:	e1dffe2f 	ld1q	{za15v.q\[w15, 0\]}, p7/z, \[x17, xzr, lsl #4\]
 138:	e000ffef 	ld1b	{za0v.b\[w15, 15\]}, p7/z, \[sp, x0\]
 13c:	e0010000 	ld1b	{za0h.b\[w12, 0\]}, p0/z, \[x0, x1\]
 140:	e0410000 	ld1h	{za0h.h\[w12, 0\]}, p0/z, \[x0, x1, lsl #1\]
 144:	e0819c0f 	ld1w	{za3v.s\[w12, 3\]}, p7/z, \[x0, x1, lsl #2\]
 148:	e0c10000 	ld1d	{za0h.d\[w12, 0\]}, p0/z, \[x0, x1, lsl #3\]
 14c:	e1c18000 	ld1q	{za0v.q\[w12, 0\]}, p0/z, \[x0, x1, lsl #4\]
